The present invention relates to a manufacturing method of semiconductor device, and more particularly to a MOSFET of so-called salicide structure having a silicide layer on a source region, on a drain region, and on a gate electrode.
FIG. 1 shows a plane pattern of a conventional semiconductor device.
A semiconductor substrate 11 is divided into an element isolation region 12, and an element region 13. In the element isolation region 12, a field oxide film by LOCOS method, or a silicon oxide film in STI (Shallow Trench Isolation) structure is formed. In the element region 13, a MOSFET is formed. The MOSFET is composed of a gate electrode 14, and source and drain regions 15 formed in the semiconductor substrate 11 at both sides of the gate electrode 14.
In such semiconductor device, the interval of gate electrodes 14 of two MOSFETs adjacent to each other is expressed by W. Hitherto, by minimizing this interval W, it has been attempted to reduce the area of one MOSFET occupying on the semiconductor substrate 11, and mount the MOSFETs on the semiconductor substrate 11 at high density.
FIG. 2 shows a conventional semiconductor device attempted to enhance the density of MOSFETs. FIG. 3 shows a sectional view along line III--III in FIG. 2.
It is a first feature of this semiconductor device that the contact of the source and drain regions 15 of the MOSFET is achieved at one position only at the end of the source and drain regions 15 so as to minimize the interval W of the gate electrodes 14 of two MOSFETs adjacent to each other.
In this case, it contributes to enhancement of density of MOSFETs, but the length Y of the source and drain regions 15 is extremely short, and its resistance value is large. As a result, the potential in the contact area 16 and the potential at a position remote from the contact area 16 are different, and the characteristic of the MOSFET is impaired.
Hence, it is a second feature herein that a silicide layer 17 is formed on the source and drain regions 15. The silicide layer 17 is low in the resistance value, and is effective for suppressing the potential drop between the contact area 16 and a position remote from the contact area 16. In this example, the salicide structure is employed by forming a silicide layer 17 also on the gate electrode 14 aside from the source and drain regions 15.
On the other hand, as the MOSFET becomes smaller in size, the LDD structure is often employed for alleviating the electric field near the source and drain regions at the end of the gate electrode 14. The LDD structure is composed of a low density doping region 18 having a lower concentration than the concentration of the source and drain regions 15.
Incidentally, when the length X of the gate electrode 14 is about 0.25 microns (250 nm), the length Y of the source and drain regions 15 is set at about 200 nm. To realize the LDD structure, the width a of a side wall insulating film (spacer) 19 must be least 100 nm in consideration of the extended width (about 50 nm) h of the source and drain regions 15 due to thermal diffusion.
That is, the width b of possible silicide forming region is Y-a (about 100 nm). Usually, the width Z of the source and drain regions is several microns, and if the resistance value R of the silicide layer 17 is low, as shown in FIG. 4, a potential drop occurs between the contact area 16 and a position remote from the contact area 16 due to this resistance value R, and the characteristic of the MOSFET is impaired.
To prevent such potential drop, the width a of the side wall insulating film 19 must be reduced, but if the width a of the side wall insulating film 19 is too narrow, the source and drain regions 15 may cover the low density doping region 18 by the lateral diffusion of the source and drain regions 15, thereby worsening the short channel effect of the MOSFET.
Thus, conventionally, the potential drop in the source and drain regions was prevented by forming a silicide layer on the source and drain region, but in the case of MOSFET having LDD structure, when the length of the source and drain regions becomes short, the region for forming the silicide layer is decreased by the portion of the thickness (width) of the side wall insulating film for LDD, and the potential drop cannot be prevented sufficiently.